The term "von Neumann architecture" has evolved to refer to any stored-program computer in which an instruction fetch and a data operation cannot occur at the same time (since they share a common bus). This is referred to as the von Neumann bottleneck, which often limits the performance of the corresponding system.

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The vast majority of modern computers use the same memory for both data and program instructions,
but have caches between the CPU and memory, and,
for the caches closest to the CPU, have separate caches for instructions and data,
so that most instruction and data fetches use separate buses (split cache architecture).

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the processor core implements a (modified) Harvard architecture, and benefit from its speed advantages.